DSPIC33EV256GM104-I/PT Microchip, 16bit Digital Signal Processor 70MHz 256 kB Flash 44-Pin TQFP

RS Stock No.: 869-6110Brand: MicrochipManufacturers Part No.: DSPIC33EV256GM104-I/PT
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Technical Document

Specifications

Maximum Frequency

70MHz

Device Million Instructions per Second

70MIPS

Data Bus Width

16bit

RAM Size

16 kB

Instruction Set Architecture

C

Program Memory Size

256 kB

Program Memory Type

Flash

Mounting Type

Surface Mount

Package Type

TQFP

Pin Count

44

Typical Operating Supply Voltage

4.5 to 5.5 V

Number of UART Channels

2

Height

1.1mm

Number of LIN Channels

0

Width

10mm

Number of USART Channels

0

Timers

2 x 32 bit, 5 x 16 bit

Dimensions

10 x 10 x 1.05mm

Pulse Width Modulation

6

Number of SPI Channels

2

USB Channels

0

Number of Ethernet Channels

0

Number of Timers

2, 5

Number of I2C Channels

1

Number of PCI Channels

0

ADC Resolution

12 bit, 10bit

Minimum Operating Temperature

-40 °C

Number of CAN Channels

1

ADC Channels

1

Number of ADC Units

1

Maximum Operating Temperature

+85 °C

Length

10mm

ADCs

1 (1 x 10/12 bit)

Timer Resolution

16 bit, 32bit

Product details

dsPIC33EVxxxGM00x/10x 16-Bit Digital Signal Controllers

Microchip’s dsPIC33EV family of 16-bit Digital Signal Controllers (DSCs) features a 70 MIPS dsPIC® DSC core with enhanced on-chip features. Capable of operating in harsh environments these devices are suitable for appliance and automotive applications. Rich peripheral integration includes SENT (Single-Edge Nibble Transmission-Transmit/Receive), High Speed PWMs, OP Amps and Error Correcting Code Flash for increased reliability and safety. The performance offered by the dsPIC33EV family of MCUs allows them to be incorporated into the design of high-performance, precision motor control systems that are more energy efficient. They can be used to control BLDC, permanent magnet synchronous, AC induction and stepper motors.

Microcontroller Features

70 MHz Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
16-Bit Wide Data Path
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle, Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Intermediate Security for Memory - Provides a Boot Flash Segment in addition to the existing General Flash Segment
Error Code Correction (ECC) for Flash
Added Two Alternate Register Sets for Fast Context Switching

Clock Management Features

Internal, 15% Low-Power RC (LPRC) – 32 kHz
Internal, 1% Fast RC (FRC) – 7.37 MHz
Internal, 10% Backup RC (BFRC) – 7.37 MHz
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Additional Fail-Safe Clock Monitor Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock
Independent Watchdog Timer (WDT)
System Windowed Watchdog Timer (DMT)
Fast Wake-Up and Start-Up

Power Management Features

Low-Power Management modes (Sleep, Idle and Doze)
Power Consumption Minimized Executing NOP String
Integrated Power-on Reset (POR) and Brown-out Reset (BOR)
0.5 mA/MHz Dynamic Current (typical)
50 μA at +25°C IPD Current (typical)

Peripheral Features

Up to Six Pulse-Width Modulation (PWM) Outputs (three generators)
Configurable Analogue to Digital Converter (ADC) Module
Up to 4 Operational Amplifiers
Up to 5 Comparators
Charge Time Measurement Unit (CTMU) - Supports mTouch™ capacitive touch sensing
Five 16-bit Timers
Two 32-bit Timers
Four Output Capture modules Configurable as Timers/Counters
Four Input Capture modules
Two Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
Two SPI Modules
One I2C Module with SMBus Support

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P.O.A.

DSPIC33EV256GM104-I/PT Microchip, 16bit Digital Signal Processor 70MHz 256 kB Flash 44-Pin TQFP
Select packaging type

P.O.A.

DSPIC33EV256GM104-I/PT Microchip, 16bit Digital Signal Processor 70MHz 256 kB Flash 44-Pin TQFP
Stock information temporarily unavailable.
Select packaging type

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Technical Document

Specifications

Maximum Frequency

70MHz

Device Million Instructions per Second

70MIPS

Data Bus Width

16bit

RAM Size

16 kB

Instruction Set Architecture

C

Program Memory Size

256 kB

Program Memory Type

Flash

Mounting Type

Surface Mount

Package Type

TQFP

Pin Count

44

Typical Operating Supply Voltage

4.5 to 5.5 V

Number of UART Channels

2

Height

1.1mm

Number of LIN Channels

0

Width

10mm

Number of USART Channels

0

Timers

2 x 32 bit, 5 x 16 bit

Dimensions

10 x 10 x 1.05mm

Pulse Width Modulation

6

Number of SPI Channels

2

USB Channels

0

Number of Ethernet Channels

0

Number of Timers

2, 5

Number of I2C Channels

1

Number of PCI Channels

0

ADC Resolution

12 bit, 10bit

Minimum Operating Temperature

-40 °C

Number of CAN Channels

1

ADC Channels

1

Number of ADC Units

1

Maximum Operating Temperature

+85 °C

Length

10mm

ADCs

1 (1 x 10/12 bit)

Timer Resolution

16 bit, 32bit

Product details

dsPIC33EVxxxGM00x/10x 16-Bit Digital Signal Controllers

Microchip’s dsPIC33EV family of 16-bit Digital Signal Controllers (DSCs) features a 70 MIPS dsPIC® DSC core with enhanced on-chip features. Capable of operating in harsh environments these devices are suitable for appliance and automotive applications. Rich peripheral integration includes SENT (Single-Edge Nibble Transmission-Transmit/Receive), High Speed PWMs, OP Amps and Error Correcting Code Flash for increased reliability and safety. The performance offered by the dsPIC33EV family of MCUs allows them to be incorporated into the design of high-performance, precision motor control systems that are more energy efficient. They can be used to control BLDC, permanent magnet synchronous, AC induction and stepper motors.

Microcontroller Features

70 MHz Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
16-Bit Wide Data Path
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle, Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Intermediate Security for Memory - Provides a Boot Flash Segment in addition to the existing General Flash Segment
Error Code Correction (ECC) for Flash
Added Two Alternate Register Sets for Fast Context Switching

Clock Management Features

Internal, 15% Low-Power RC (LPRC) – 32 kHz
Internal, 1% Fast RC (FRC) – 7.37 MHz
Internal, 10% Backup RC (BFRC) – 7.37 MHz
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Additional Fail-Safe Clock Monitor Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock
Independent Watchdog Timer (WDT)
System Windowed Watchdog Timer (DMT)
Fast Wake-Up and Start-Up

Power Management Features

Low-Power Management modes (Sleep, Idle and Doze)
Power Consumption Minimized Executing NOP String
Integrated Power-on Reset (POR) and Brown-out Reset (BOR)
0.5 mA/MHz Dynamic Current (typical)
50 μA at +25°C IPD Current (typical)

Peripheral Features

Up to Six Pulse-Width Modulation (PWM) Outputs (three generators)
Configurable Analogue to Digital Converter (ADC) Module
Up to 4 Operational Amplifiers
Up to 5 Comparators
Charge Time Measurement Unit (CTMU) - Supports mTouch™ capacitive touch sensing
Five 16-bit Timers
Two 32-bit Timers
Four Output Capture modules Configurable as Timers/Counters
Four Input Capture modules
Two Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
Two SPI Modules
One I2C Module with SMBus Support