Texas Instruments SN74LV08APWR, Quad 2-Input AND Logic Gate, 14-Pin TSSOP
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
14
Logic Family
LV
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-12mA
Maximum Propagation Delay Time @ Maximum CL
12.3 ns @ 3.3 V, 17.3 ns @ 2.5 V, 7.9 ns @ 5 V
Minimum Operating Supply Voltage
2 V
Maximum Low Level Output Current
12mA
Height
1.15mm
Width
4.4mm
Minimum Operating Temperature
-40 °C
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
5mm
Product details
74LV Family, Texas Instruments
Low-Voltage CMOS logic
Operating Voltage: 2 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LV Family
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P.O.A.
2000
P.O.A.
2000
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
14
Logic Family
LV
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-12mA
Maximum Propagation Delay Time @ Maximum CL
12.3 ns @ 3.3 V, 17.3 ns @ 2.5 V, 7.9 ns @ 5 V
Minimum Operating Supply Voltage
2 V
Maximum Low Level Output Current
12mA
Height
1.15mm
Width
4.4mm
Minimum Operating Temperature
-40 °C
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
5mm
Product details
74LV Family, Texas Instruments
Low-Voltage CMOS logic
Operating Voltage: 2 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LV Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products