Texas Instruments SN74LVC162244ADGGR 16-Channel Buffer & Line Driver, 3-State, 48-Pin TSSOP
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
Number of Channels per Chip
16
IC Type
Buffer & Line Driver IC
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Maximum High Level Output Current
-12mA
Maximum Low Level Output Current
12mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 30 pF
Dimensions
12.6 x 6.2 x 1.05mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
30pF
Country of Origin
Malaysia
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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P.O.A.
2000
P.O.A.
2000
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
Number of Channels per Chip
16
IC Type
Buffer & Line Driver IC
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Maximum High Level Output Current
-12mA
Maximum Low Level Output Current
12mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 30 pF
Dimensions
12.6 x 6.2 x 1.05mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
30pF
Country of Origin
Malaysia
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22