Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NOR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4.5 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Dimensions
2.15 x 1.4 x 1mm
Width
1.4mm
Maximum Operating Temperature
+125 °C
Output Type
CMOS
Length
2.15mm
Height
1mm
Country of Origin
China
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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P.O.A.
3000
P.O.A.
3000
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NOR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4.5 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Dimensions
2.15 x 1.4 x 1mm
Width
1.4mm
Maximum Operating Temperature
+125 °C
Output Type
CMOS
Length
2.15mm
Height
1mm
Country of Origin
China
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22