Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Set/Reset
Master Reset
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
18 ns @ 1.8 V
Dimensions
13 x 7.6 x 2.45mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Height
2.45mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
13mm
Width
7.6mm
Minimum Operating Supply Voltage
1.2 V
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
P.O.A.
Each (In a Pack of 10) (Exc. Vat)
10
P.O.A.
Each (In a Pack of 10) (Exc. Vat)
Stock information temporarily unavailable.
10
Stock information temporarily unavailable.
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Set/Reset
Master Reset
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
18 ns @ 1.8 V
Dimensions
13 x 7.6 x 2.45mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Height
2.45mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
13mm
Width
7.6mm
Minimum Operating Supply Voltage
1.2 V
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS