Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
6
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
3.2 ns @ 3 V → 3.6 V, 3.6 ns @ 2.7 V
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Dimensions
8.75 x 4 x 1.45mm
Height
1.45mm
Maximum Operating Supply Voltage
3.6 V
Width
4mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.75mm
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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P.O.A.
57
P.O.A.
57
Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
6
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
3.2 ns @ 3 V → 3.6 V, 3.6 ns @ 2.7 V
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Dimensions
8.75 x 4 x 1.45mm
Height
1.45mm
Maximum Operating Supply Voltage
3.6 V
Width
4mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.75mm
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS