Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels per Chip
1
IC Type
Buffer & Line Driver IC
Input Type
CMOS
Output Type
Open Drain
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Maximum Low Level Output Current
30mA
Maximum Propagation Delay Time @ Maximum CL
8.4 ns@ 1.65 V
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
P.O.A.
Each (Supplied as a Tape) (Exc. Vat)
Standard
200
P.O.A.
Each (Supplied as a Tape) (Exc. Vat)
Standard
200
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Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels per Chip
1
IC Type
Buffer & Line Driver IC
Input Type
CMOS
Output Type
Open Drain
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Maximum Low Level Output Current
30mA
Maximum Propagation Delay Time @ Maximum CL
8.4 ns@ 1.65 V
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS