Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
D Type
Input Type
TTL
Output Type
CMOS
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
8
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
7.1 ns@ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 3.1 x 0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
3.1mm
Height
0.95mm
Width
3.1mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
P.O.A.
Each (In a Pack of 30) (Exc. Vat)
Standard
30
P.O.A.
Each (In a Pack of 30) (Exc. Vat)
Standard
30
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Technical Document
Specifications
Brand
NexperiaLogic Family
74LVC
Logic Function
D Type
Input Type
TTL
Output Type
CMOS
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
8
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
7.1 ns@ 50 pF
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 3.1 x 0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
3.1mm
Height
0.95mm
Width
3.1mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Flip-Flops & Latches, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS