Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Schmitt Trigger Input
Yes
Package Type
SSOP
Pin Count
8
Logic Family
LVC
Input Type
Schmitt Trigger
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V, 6 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Dimensions
2.95 x 2.8 x 1.29mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2.95mm
Minimum Operating Temperature
-40 °C
Height
1.29mm
Width
2.8mm
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
P.O.A.
Each (In a Pack of 10) (Exc. Vat)
Standard
10
P.O.A.
Each (In a Pack of 10) (Exc. Vat)
Standard
10
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Schmitt Trigger Input
Yes
Package Type
SSOP
Pin Count
8
Logic Family
LVC
Input Type
Schmitt Trigger
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V, 6 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Dimensions
2.95 x 2.8 x 1.29mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2.95mm
Minimum Operating Temperature
-40 °C
Height
1.29mm
Width
2.8mm
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS