Texas Instruments SN74LVC1G04DPWR Inverter, 4-Pin X2SON

RS Stock No.: 162-8339Brand: Texas InstrumentsManufacturers Part No.: SN74LVC1G04DPWR
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Technical Document

Specifications

Logic Function

Inverter

Output Type

Single Ended

Number of Elements per Chip

1

Schmitt Trigger Input

No

Maximum Propagation Delay Time @ Maximum CL

6.4 ns @ 15 pF

Maximum High Level Output Current

-32mA

Maximum Low Level Output Current

32mA

Mounting Type

Surface Mount

Package Type

X2SON

Pin Count

4

Logic Family

LVC

Dimensions

0.85 x 0.85 x 0.35mm

Maximum Operating Supply Voltage

5.5 V

Height

0.35mm

Minimum Operating Temperature

-40 °C

Minimum Operating Supply Voltage

1.65 V

Maximum Operating Temperature

+125 °C

Propagation Delay Test Condition

15pF

Length

0.85mm

Width

0.85mm

Country of Origin

Malaysia

Product details

74LVC1G Family, Texas Instruments

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22

74LVC Family

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P.O.A.

Texas Instruments SN74LVC1G04DPWR Inverter, 4-Pin X2SON

P.O.A.

Texas Instruments SN74LVC1G04DPWR Inverter, 4-Pin X2SON
Stock information temporarily unavailable.

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Technical Document

Specifications

Logic Function

Inverter

Output Type

Single Ended

Number of Elements per Chip

1

Schmitt Trigger Input

No

Maximum Propagation Delay Time @ Maximum CL

6.4 ns @ 15 pF

Maximum High Level Output Current

-32mA

Maximum Low Level Output Current

32mA

Mounting Type

Surface Mount

Package Type

X2SON

Pin Count

4

Logic Family

LVC

Dimensions

0.85 x 0.85 x 0.35mm

Maximum Operating Supply Voltage

5.5 V

Height

0.35mm

Minimum Operating Temperature

-40 °C

Minimum Operating Supply Voltage

1.65 V

Maximum Operating Temperature

+125 °C

Propagation Delay Test Condition

15pF

Length

0.85mm

Width

0.85mm

Country of Origin

Malaysia

Product details

74LVC1G Family, Texas Instruments

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22

74LVC Family

Ideate. Create. Collaborate

JOIN FOR FREE

No hidden fees!

design-spark
design-spark
  • Download and use our DesignSpark software for your PCB and 3D Mechanical designs
  • View and contribute website content and forums
  • Download 3D Models, Schematics and Footprints from more than a million products
Click here to find out more