Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Inverter
Logic Function
Inverter
Input Type
Schmitt Trigger
Output Type
CMOS, Push Pull
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ CL
13ns
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Supply Voltage
1.65V
Mount Type
Surface
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Minimum Operating Temperature
-40°C
Logic Family
LVC
Maximum Operating Temperature
85°C
Width
1.6 mm
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Series
SN74LVC1G14
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
P.O.A.
Each (On a Reel of 3000) (Exc. Vat)
3000
P.O.A.
Each (On a Reel of 3000) (Exc. Vat)
Stock information temporarily unavailable.
3000
Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Inverter
Logic Function
Inverter
Input Type
Schmitt Trigger
Output Type
CMOS, Push Pull
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ CL
13ns
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Supply Voltage
1.65V
Mount Type
Surface
Package Type
SOT-23
Maximum Supply Voltage
5.5V
Pin Count
5
Minimum Operating Temperature
-40°C
Logic Family
LVC
Maximum Operating Temperature
85°C
Width
1.6 mm
Height
1.15mm
Length
2.9mm
Standards/Approvals
No
Series
SN74LVC1G14
Automotive Standard
No
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22


