Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
6
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
6.2 ns @ 3.3 V, 7.3 ns @ 2.7 V
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Dimensions
8.65 x 3.91 x 1.58mm
Height
1.58mm
Maximum Operating Supply Voltage
3.6 V
Width
3.91mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.65mm
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
6
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
6.2 ns @ 3.3 V, 7.3 ns @ 2.7 V
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Dimensions
8.65 x 3.91 x 1.58mm
Height
1.58mm
Maximum Operating Supply Voltage
3.6 V
Width
3.91mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.65mm
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22